Support for New Devices

Support for new PIC microcontrollers can be added by adding new entries in the PicDevices.properties file. Each entry has the following format:

<DEVICE_NAME>=<DEVICE_ID>,<LO_PROGRAM>,<HI_PROGRAM>,<LO_EEPROM>,<HI_EEPROM>,<CONFIG_BITS>

where the DEVICE_NAME field specifies the device name, the DEVICE_ID field is used to identify the Device ID, LO_PROGRAM and HI_PROGRAM fields define the program code space (low and high addresses) excluding the boot sector. The LO_EEPROM and HI_EEPROM fields specify the low and high EEPROM data addresses. DEVICE_NAME is a decimal number and all other numeric fields are in hexadecimal format.

For instance, the following entry is used to describe the PIC18F452:

PIC18F458=67,200,7fff,0,ff,OSCSEN,FOSC20,BORV,BOREN,PWRTEN,WDTPS20,WDTEN,CCP2MX,DEBUG,LVP,STVREN,CP3,CP2,CP1,CP0,CPD,CPB,WRT3,WRT2,WRT1,WRT0,WRTD,WRTB,WRTC,EBTR3,EBTR2,EBTR1,EBTR0,EBTRB

This entry tells the bootloader application that the PIC microcontroller with Device ID 67 is a PIC18F458 with program space starting at address 0x0200 and ending at 0x7FFF. The EEPROM data starts at 0 and ends at address 0xFF. The Configuration bits implemented for that device and stored between address 0x300000 and 0x30000D are: OSCSEN, FOSC20, BORV, BOREN, PWRTEN, WDTPS20, WDTEN, CCP2MX, DEBUG, LVP, STVREN, CP3, CP2, CP1, CP0, CPD, CPB, WRT3, WRT2, WRT1, WRT0, WRTD, WRTB, WRTC, EBTR3, EBTR2, EBTR1, EBTR0, EBTRB

Supported Configuration bit options: USBPLL, CPUDIV, PLLDIV, IESO, FSCM, FCMEN, OSCSEN, FOSC20, FOSC30, VREGEN, BORV, BOREN, BOREN10, PWRTEN, WINEN, WDTPS20, WDTPS30, WDTEN, WAIT, ABW, BW, GPTREN, !T1OSCMX, HPOL, LPOL, PWMPIN, PM, MCLRE, EXCLKMX, PWM4MX, SSPMX, LPT1OSC, T1OSCMX, PBADEN, ECPPMX, FLTAMX, CCP2MX, DEBUG, XINST, BBSIZ, ICPRT, LVP, STVREN, CP7, CP6, CP5, CP4, CP3, CP2, CP1, CP0, CPD, CPB, WRT7, WRT6, WRT5, WRT4, WRT3, WRT2, WRT1, WRT0, WRTD, WRTB, WRTC, EBTR7, EBTR6, EBTR5, EBTR4, EBTR3, EBTR2, EBTR1, EBTR0, EBTRB.

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